DSLogic Core Board

From wiki for DSLogic project
Jump to: navigation, search

Specification

  • Maximum sample rate:
    • 4 channels @ 400MHz
    • 8 channels @ 200MHz
    • 16 channels @ 100MHz
  • Maximum sample depth:
    • Total 256M (16M samples per channel)
  • Recommanded input voltage range: -0.6V to +6V
  • Absolute input voltage range: -30V to +30V
  • Input impedance: 250Kohm
  • Maximum Input Bandwidth: 50MHz
  • Maximum state clock: 50MHz

PCB

Pcb core.JPG

Interface

External Interface

Hardware logic external interface.jpg

FPGA JTAG

Hardware logic fpga jtag.jpg

Extension Differential Interface

Hardware logic diff interface.jpg

Schematic

Hardware logic schematic.jpg

[Download PDF version]